Dr. Taeyoung Kim (김태영;金泰永)


Taeyoung Kim

Biographical Sketch

Dr. Kim is a staff AI software architect with 12 years of software engineering experience plus 10 years system research experience (AI, scientific computing, EDA). Specialized on System-level optimization with using Machine Learning. At Intel, he drives pathfinding R&D of on-device AI software platform to develop AI-based system-level modeling and optimization. Until 2021, he worked channel analysis tools for signal integrity and power integrity solutions for VLSI high-speed I/O interconnect. He has authored or co-authored more than thirty papers in scientific papers and one book publication about machine learning-based dynamic resource management in 2019. Since 2020, he has worked as a standard committee of IEEE P1924.1, which recently officially standardized in IEEE. He has been an associate editor of Integration, the VLSI Journal, and a TPC of major VLSI conferences since 2017 for DAC/ISLPED/ASP-DAC.

He has received the M.S. degree in electrical engineering from University of Virginia, Charlottesville, VA, USA in 2012, and the Ph.D. degree in computer science from University of California, Riverside, CA, USA in 2017. His dissertation was titled "System-level Electromigration-Induced Dynamic Reliability Management." During his Ph.D. study, he received a best research award at ACM Ph.D. Forum at Design Automation Conference (DAC) in 2015 and a dissertation award from the University of California in 2017.

Selected Publications